ยปCore Development>Code coverage>Modules/_ctypes/libffi/src/x86/ffi64.c

Python code coverage for Modules/_ctypes/libffi/src/x86/ffi64.c

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1n/a/* -----------------------------------------------------------------------
2n/a ffi64.c - Copyright (c) 2013 The Written Word, Inc.
3n/a Copyright (c) 2011 Anthony Green
4n/a Copyright (c) 2008, 2010 Red Hat, Inc.
5n/a Copyright (c) 2002, 2007 Bo Thorsen <bo@suse.de>
6n/a
7n/a x86-64 Foreign Function Interface
8n/a
9n/a Permission is hereby granted, free of charge, to any person obtaining
10n/a a copy of this software and associated documentation files (the
11n/a ``Software''), to deal in the Software without restriction, including
12n/a without limitation the rights to use, copy, modify, merge, publish,
13n/a distribute, sublicense, and/or sell copies of the Software, and to
14n/a permit persons to whom the Software is furnished to do so, subject to
15n/a the following conditions:
16n/a
17n/a The above copyright notice and this permission notice shall be included
18n/a in all copies or substantial portions of the Software.
19n/a
20n/a THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
21n/a EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22n/a MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
23n/a NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
24n/a HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
25n/a WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26n/a OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27n/a DEALINGS IN THE SOFTWARE.
28n/a ----------------------------------------------------------------------- */
29n/a
30n/a#include <ffi.h>
31n/a#include <ffi_common.h>
32n/a
33n/a#include <stdlib.h>
34n/a#include <stdarg.h>
35n/a
36n/a#ifdef __x86_64__
37n/a
38n/a#define MAX_GPR_REGS 6
39n/a#define MAX_SSE_REGS 8
40n/a
41n/a#if defined(__INTEL_COMPILER)
42n/a#include "xmmintrin.h"
43n/a#define UINT128 __m128
44n/a#else
45n/a#if defined(__SUNPRO_C)
46n/a#include <sunmedia_types.h>
47n/a#define UINT128 __m128i
48n/a#else
49n/a#define UINT128 __int128_t
50n/a#endif
51n/a#endif
52n/a
53n/aunion big_int_union
54n/a{
55n/a UINT32 i32;
56n/a UINT64 i64;
57n/a UINT128 i128;
58n/a};
59n/a
60n/astruct register_args
61n/a{
62n/a /* Registers for argument passing. */
63n/a UINT64 gpr[MAX_GPR_REGS];
64n/a union big_int_union sse[MAX_SSE_REGS];
65n/a};
66n/a
67n/aextern void ffi_call_unix64 (void *args, unsigned long bytes, unsigned flags,
68n/a void *raddr, void (*fnaddr)(void), unsigned ssecount);
69n/a
70n/a/* All reference to register classes here is identical to the code in
71n/a gcc/config/i386/i386.c. Do *not* change one without the other. */
72n/a
73n/a/* Register class used for passing given 64bit part of the argument.
74n/a These represent classes as documented by the PS ABI, with the
75n/a exception of SSESF, SSEDF classes, that are basically SSE class,
76n/a just gcc will use SF or DFmode move instead of DImode to avoid
77n/a reformatting penalties.
78n/a
79n/a Similary we play games with INTEGERSI_CLASS to use cheaper SImode moves
80n/a whenever possible (upper half does contain padding). */
81n/aenum x86_64_reg_class
82n/a {
83n/a X86_64_NO_CLASS,
84n/a X86_64_INTEGER_CLASS,
85n/a X86_64_INTEGERSI_CLASS,
86n/a X86_64_SSE_CLASS,
87n/a X86_64_SSESF_CLASS,
88n/a X86_64_SSEDF_CLASS,
89n/a X86_64_SSEUP_CLASS,
90n/a X86_64_X87_CLASS,
91n/a X86_64_X87UP_CLASS,
92n/a X86_64_COMPLEX_X87_CLASS,
93n/a X86_64_MEMORY_CLASS
94n/a };
95n/a
96n/a#define MAX_CLASSES 4
97n/a
98n/a#define SSE_CLASS_P(X) ((X) >= X86_64_SSE_CLASS && X <= X86_64_SSEUP_CLASS)
99n/a
100n/a/* x86-64 register passing implementation. See x86-64 ABI for details. Goal
101n/a of this code is to classify each 8bytes of incoming argument by the register
102n/a class and assign registers accordingly. */
103n/a
104n/a/* Return the union class of CLASS1 and CLASS2.
105n/a See the x86-64 PS ABI for details. */
106n/a
107n/astatic enum x86_64_reg_class
108n/amerge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
109n/a{
110n/a /* Rule #1: If both classes are equal, this is the resulting class. */
111n/a if (class1 == class2)
112n/a return class1;
113n/a
114n/a /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
115n/a the other class. */
116n/a if (class1 == X86_64_NO_CLASS)
117n/a return class2;
118n/a if (class2 == X86_64_NO_CLASS)
119n/a return class1;
120n/a
121n/a /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
122n/a if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
123n/a return X86_64_MEMORY_CLASS;
124n/a
125n/a /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
126n/a if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
127n/a || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
128n/a return X86_64_INTEGERSI_CLASS;
129n/a if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
130n/a || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
131n/a return X86_64_INTEGER_CLASS;
132n/a
133n/a /* Rule #5: If one of the classes is X87, X87UP, or COMPLEX_X87 class,
134n/a MEMORY is used. */
135n/a if (class1 == X86_64_X87_CLASS
136n/a || class1 == X86_64_X87UP_CLASS
137n/a || class1 == X86_64_COMPLEX_X87_CLASS
138n/a || class2 == X86_64_X87_CLASS
139n/a || class2 == X86_64_X87UP_CLASS
140n/a || class2 == X86_64_COMPLEX_X87_CLASS)
141n/a return X86_64_MEMORY_CLASS;
142n/a
143n/a /* Rule #6: Otherwise class SSE is used. */
144n/a return X86_64_SSE_CLASS;
145n/a}
146n/a
147n/a/* Classify the argument of type TYPE and mode MODE.
148n/a CLASSES will be filled by the register class used to pass each word
149n/a of the operand. The number of words is returned. In case the parameter
150n/a should be passed in memory, 0 is returned. As a special case for zero
151n/a sized containers, classes[0] will be NO_CLASS and 1 is returned.
152n/a
153n/a See the x86-64 PS ABI for details.
154n/a*/
155n/astatic size_t
156n/aclassify_argument (ffi_type *type, enum x86_64_reg_class classes[],
157n/a size_t byte_offset)
158n/a{
159n/a switch (type->type)
160n/a {
161n/a case FFI_TYPE_UINT8:
162n/a case FFI_TYPE_SINT8:
163n/a case FFI_TYPE_UINT16:
164n/a case FFI_TYPE_SINT16:
165n/a case FFI_TYPE_UINT32:
166n/a case FFI_TYPE_SINT32:
167n/a case FFI_TYPE_UINT64:
168n/a case FFI_TYPE_SINT64:
169n/a case FFI_TYPE_POINTER:
170n/a {
171n/a size_t size = byte_offset + type->size;
172n/a
173n/a if (size <= 4)
174n/a {
175n/a classes[0] = X86_64_INTEGERSI_CLASS;
176n/a return 1;
177n/a }
178n/a else if (size <= 8)
179n/a {
180n/a classes[0] = X86_64_INTEGER_CLASS;
181n/a return 1;
182n/a }
183n/a else if (size <= 12)
184n/a {
185n/a classes[0] = X86_64_INTEGER_CLASS;
186n/a classes[1] = X86_64_INTEGERSI_CLASS;
187n/a return 2;
188n/a }
189n/a else if (size <= 16)
190n/a {
191n/a classes[0] = classes[1] = X86_64_INTEGERSI_CLASS;
192n/a return 2;
193n/a }
194n/a else
195n/a FFI_ASSERT (0);
196n/a }
197n/a case FFI_TYPE_FLOAT:
198n/a if (!(byte_offset % 8))
199n/a classes[0] = X86_64_SSESF_CLASS;
200n/a else
201n/a classes[0] = X86_64_SSE_CLASS;
202n/a return 1;
203n/a case FFI_TYPE_DOUBLE:
204n/a classes[0] = X86_64_SSEDF_CLASS;
205n/a return 1;
206n/a#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
207n/a case FFI_TYPE_LONGDOUBLE:
208n/a classes[0] = X86_64_X87_CLASS;
209n/a classes[1] = X86_64_X87UP_CLASS;
210n/a return 2;
211n/a#endif
212n/a case FFI_TYPE_STRUCT:
213n/a {
214n/a const size_t UNITS_PER_WORD = 8;
215n/a size_t words = (type->size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
216n/a ffi_type **ptr;
217n/a int i;
218n/a enum x86_64_reg_class subclasses[MAX_CLASSES];
219n/a
220n/a /* If the struct is larger than 32 bytes, pass it on the stack. */
221n/a if (type->size > 32)
222n/a return 0;
223n/a
224n/a for (i = 0; i < words; i++)
225n/a classes[i] = X86_64_NO_CLASS;
226n/a
227n/a /* Zero sized arrays or structures are NO_CLASS. We return 0 to
228n/a signalize memory class, so handle it as special case. */
229n/a if (!words)
230n/a {
231n/a classes[0] = X86_64_NO_CLASS;
232n/a return 1;
233n/a }
234n/a
235n/a /* Merge the fields of structure. */
236n/a for (ptr = type->elements; *ptr != NULL; ptr++)
237n/a {
238n/a size_t num;
239n/a
240n/a byte_offset = ALIGN (byte_offset, (*ptr)->alignment);
241n/a
242n/a num = classify_argument (*ptr, subclasses, byte_offset % 8);
243n/a if (num == 0)
244n/a return 0;
245n/a for (i = 0; i < num; i++)
246n/a {
247n/a size_t pos = byte_offset / 8;
248n/a classes[i + pos] =
249n/a merge_classes (subclasses[i], classes[i + pos]);
250n/a }
251n/a
252n/a byte_offset += (*ptr)->size;
253n/a }
254n/a
255n/a if (words > 2)
256n/a {
257n/a /* When size > 16 bytes, if the first one isn't
258n/a X86_64_SSE_CLASS or any other ones aren't
259n/a X86_64_SSEUP_CLASS, everything should be passed in
260n/a memory. */
261n/a if (classes[0] != X86_64_SSE_CLASS)
262n/a return 0;
263n/a
264n/a for (i = 1; i < words; i++)
265n/a if (classes[i] != X86_64_SSEUP_CLASS)
266n/a return 0;
267n/a }
268n/a
269n/a /* Final merger cleanup. */
270n/a for (i = 0; i < words; i++)
271n/a {
272n/a /* If one class is MEMORY, everything should be passed in
273n/a memory. */
274n/a if (classes[i] == X86_64_MEMORY_CLASS)
275n/a return 0;
276n/a
277n/a /* The X86_64_SSEUP_CLASS should be always preceded by
278n/a X86_64_SSE_CLASS or X86_64_SSEUP_CLASS. */
279n/a if (classes[i] == X86_64_SSEUP_CLASS
280n/a && classes[i - 1] != X86_64_SSE_CLASS
281n/a && classes[i - 1] != X86_64_SSEUP_CLASS)
282n/a {
283n/a /* The first one should never be X86_64_SSEUP_CLASS. */
284n/a FFI_ASSERT (i != 0);
285n/a classes[i] = X86_64_SSE_CLASS;
286n/a }
287n/a
288n/a /* If X86_64_X87UP_CLASS isn't preceded by X86_64_X87_CLASS,
289n/a everything should be passed in memory. */
290n/a if (classes[i] == X86_64_X87UP_CLASS
291n/a && (classes[i - 1] != X86_64_X87_CLASS))
292n/a {
293n/a /* The first one should never be X86_64_X87UP_CLASS. */
294n/a FFI_ASSERT (i != 0);
295n/a return 0;
296n/a }
297n/a }
298n/a return words;
299n/a }
300n/a
301n/a default:
302n/a FFI_ASSERT(0);
303n/a }
304n/a return 0; /* Never reached. */
305n/a}
306n/a
307n/a/* Examine the argument and return set number of register required in each
308n/a class. Return zero iff parameter should be passed in memory, otherwise
309n/a the number of registers. */
310n/a
311n/astatic size_t
312n/aexamine_argument (ffi_type *type, enum x86_64_reg_class classes[MAX_CLASSES],
313n/a _Bool in_return, int *pngpr, int *pnsse)
314n/a{
315n/a size_t n;
316n/a int i, ngpr, nsse;
317n/a
318n/a n = classify_argument (type, classes, 0);
319n/a if (n == 0)
320n/a return 0;
321n/a
322n/a ngpr = nsse = 0;
323n/a for (i = 0; i < n; ++i)
324n/a switch (classes[i])
325n/a {
326n/a case X86_64_INTEGER_CLASS:
327n/a case X86_64_INTEGERSI_CLASS:
328n/a ngpr++;
329n/a break;
330n/a case X86_64_SSE_CLASS:
331n/a case X86_64_SSESF_CLASS:
332n/a case X86_64_SSEDF_CLASS:
333n/a nsse++;
334n/a break;
335n/a case X86_64_NO_CLASS:
336n/a case X86_64_SSEUP_CLASS:
337n/a break;
338n/a case X86_64_X87_CLASS:
339n/a case X86_64_X87UP_CLASS:
340n/a case X86_64_COMPLEX_X87_CLASS:
341n/a return in_return != 0;
342n/a default:
343n/a abort ();
344n/a }
345n/a
346n/a *pngpr = ngpr;
347n/a *pnsse = nsse;
348n/a
349n/a return n;
350n/a}
351n/a
352n/a/* Perform machine dependent cif processing. */
353n/a
354n/affi_status
355n/affi_prep_cif_machdep (ffi_cif *cif)
356n/a{
357n/a int gprcount, ssecount, i, avn, ngpr, nsse, flags;
358n/a enum x86_64_reg_class classes[MAX_CLASSES];
359n/a size_t bytes, n;
360n/a
361n/a gprcount = ssecount = 0;
362n/a
363n/a flags = cif->rtype->type;
364n/a if (flags != FFI_TYPE_VOID)
365n/a {
366n/a n = examine_argument (cif->rtype, classes, 1, &ngpr, &nsse);
367n/a if (n == 0)
368n/a {
369n/a /* The return value is passed in memory. A pointer to that
370n/a memory is the first argument. Allocate a register for it. */
371n/a gprcount++;
372n/a /* We don't have to do anything in asm for the return. */
373n/a flags = FFI_TYPE_VOID;
374n/a }
375n/a else if (flags == FFI_TYPE_STRUCT)
376n/a {
377n/a /* Mark which registers the result appears in. */
378n/a _Bool sse0 = SSE_CLASS_P (classes[0]);
379n/a _Bool sse1 = n == 2 && SSE_CLASS_P (classes[1]);
380n/a if (sse0 && !sse1)
381n/a flags |= 1 << 8;
382n/a else if (!sse0 && sse1)
383n/a flags |= 1 << 9;
384n/a else if (sse0 && sse1)
385n/a flags |= 1 << 10;
386n/a /* Mark the true size of the structure. */
387n/a flags |= cif->rtype->size << 12;
388n/a }
389n/a }
390n/a
391n/a /* Go over all arguments and determine the way they should be passed.
392n/a If it's in a register and there is space for it, let that be so. If
393n/a not, add it's size to the stack byte count. */
394n/a for (bytes = 0, i = 0, avn = cif->nargs; i < avn; i++)
395n/a {
396n/a if (examine_argument (cif->arg_types[i], classes, 0, &ngpr, &nsse) == 0
397n/a || gprcount + ngpr > MAX_GPR_REGS
398n/a || ssecount + nsse > MAX_SSE_REGS)
399n/a {
400n/a long align = cif->arg_types[i]->alignment;
401n/a
402n/a if (align < 8)
403n/a align = 8;
404n/a
405n/a bytes = ALIGN (bytes, align);
406n/a bytes += cif->arg_types[i]->size;
407n/a }
408n/a else
409n/a {
410n/a gprcount += ngpr;
411n/a ssecount += nsse;
412n/a }
413n/a }
414n/a if (ssecount)
415n/a flags |= 1 << 11;
416n/a cif->flags = flags;
417n/a cif->bytes = (unsigned)ALIGN (bytes, 8);
418n/a
419n/a return FFI_OK;
420n/a}
421n/a
422n/avoid
423n/affi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)
424n/a{
425n/a enum x86_64_reg_class classes[MAX_CLASSES];
426n/a char *stack, *argp;
427n/a ffi_type **arg_types;
428n/a int gprcount, ssecount, ngpr, nsse, i, avn;
429n/a _Bool ret_in_memory;
430n/a struct register_args *reg_args;
431n/a
432n/a /* Can't call 32-bit mode from 64-bit mode. */
433n/a FFI_ASSERT (cif->abi == FFI_UNIX64);
434n/a
435n/a /* If the return value is a struct and we don't have a return value
436n/a address then we need to make one. Note the setting of flags to
437n/a VOID above in ffi_prep_cif_machdep. */
438n/a ret_in_memory = (cif->rtype->type == FFI_TYPE_STRUCT
439n/a && (cif->flags & 0xff) == FFI_TYPE_VOID);
440n/a if (rvalue == NULL && ret_in_memory)
441n/a rvalue = alloca (cif->rtype->size);
442n/a
443n/a /* Allocate the space for the arguments, plus 4 words of temp space. */
444n/a stack = alloca (sizeof (struct register_args) + cif->bytes + 4*8);
445n/a reg_args = (struct register_args *) stack;
446n/a argp = stack + sizeof (struct register_args);
447n/a
448n/a gprcount = ssecount = 0;
449n/a
450n/a /* If the return value is passed in memory, add the pointer as the
451n/a first integer argument. */
452n/a if (ret_in_memory)
453n/a reg_args->gpr[gprcount++] = (unsigned long) rvalue;
454n/a
455n/a avn = cif->nargs;
456n/a arg_types = cif->arg_types;
457n/a
458n/a for (i = 0; i < avn; ++i)
459n/a {
460n/a size_t n, size = arg_types[i]->size;
461n/a
462n/a n = examine_argument (arg_types[i], classes, 0, &ngpr, &nsse);
463n/a if (n == 0
464n/a || gprcount + ngpr > MAX_GPR_REGS
465n/a || ssecount + nsse > MAX_SSE_REGS)
466n/a {
467n/a long align = arg_types[i]->alignment;
468n/a
469n/a /* Stack arguments are *always* at least 8 byte aligned. */
470n/a if (align < 8)
471n/a align = 8;
472n/a
473n/a /* Pass this argument in memory. */
474n/a argp = (void *) ALIGN (argp, align);
475n/a memcpy (argp, avalue[i], size);
476n/a argp += size;
477n/a }
478n/a else
479n/a {
480n/a /* The argument is passed entirely in registers. */
481n/a char *a = (char *) avalue[i];
482n/a int j;
483n/a
484n/a for (j = 0; j < n; j++, a += 8, size -= 8)
485n/a {
486n/a switch (classes[j])
487n/a {
488n/a case X86_64_INTEGER_CLASS:
489n/a case X86_64_INTEGERSI_CLASS:
490n/a /* Sign-extend integer arguments passed in general
491n/a purpose registers, to cope with the fact that
492n/a LLVM incorrectly assumes that this will be done
493n/a (the x86-64 PS ABI does not specify this). */
494n/a switch (arg_types[i]->type)
495n/a {
496n/a case FFI_TYPE_SINT8:
497n/a *(SINT64 *)&reg_args->gpr[gprcount] = (SINT64) *((SINT8 *) a);
498n/a break;
499n/a case FFI_TYPE_SINT16:
500n/a *(SINT64 *)&reg_args->gpr[gprcount] = (SINT64) *((SINT16 *) a);
501n/a break;
502n/a case FFI_TYPE_SINT32:
503n/a *(SINT64 *)&reg_args->gpr[gprcount] = (SINT64) *((SINT32 *) a);
504n/a break;
505n/a default:
506n/a reg_args->gpr[gprcount] = 0;
507n/a memcpy (&reg_args->gpr[gprcount], a, size < 8 ? size : 8);
508n/a }
509n/a gprcount++;
510n/a break;
511n/a case X86_64_SSE_CLASS:
512n/a case X86_64_SSEDF_CLASS:
513n/a reg_args->sse[ssecount++].i64 = *(UINT64 *) a;
514n/a break;
515n/a case X86_64_SSESF_CLASS:
516n/a reg_args->sse[ssecount++].i32 = *(UINT32 *) a;
517n/a break;
518n/a default:
519n/a abort();
520n/a }
521n/a }
522n/a }
523n/a }
524n/a
525n/a ffi_call_unix64 (stack, cif->bytes + sizeof (struct register_args),
526n/a cif->flags, rvalue, fn, ssecount);
527n/a}
528n/a
529n/a
530n/aextern void ffi_closure_unix64(void);
531n/a
532n/affi_status
533n/affi_prep_closure_loc (ffi_closure* closure,
534n/a ffi_cif* cif,
535n/a void (*fun)(ffi_cif*, void*, void**, void*),
536n/a void *user_data,
537n/a void *codeloc)
538n/a{
539n/a volatile unsigned short *tramp;
540n/a
541n/a /* Sanity check on the cif ABI. */
542n/a {
543n/a int abi = cif->abi;
544n/a if (UNLIKELY (! (abi > FFI_FIRST_ABI && abi < FFI_LAST_ABI)))
545n/a return FFI_BAD_ABI;
546n/a }
547n/a
548n/a tramp = (volatile unsigned short *) &closure->tramp[0];
549n/a
550n/a tramp[0] = 0xbb49; /* mov <code>, %r11 */
551n/a *((unsigned long long * volatile) &tramp[1])
552n/a = (unsigned long) ffi_closure_unix64;
553n/a tramp[5] = 0xba49; /* mov <data>, %r10 */
554n/a *((unsigned long long * volatile) &tramp[6])
555n/a = (unsigned long) codeloc;
556n/a
557n/a /* Set the carry bit iff the function uses any sse registers.
558n/a This is clc or stc, together with the first byte of the jmp. */
559n/a tramp[10] = cif->flags & (1 << 11) ? 0x49f9 : 0x49f8;
560n/a
561n/a tramp[11] = 0xe3ff; /* jmp *%r11 */
562n/a
563n/a closure->cif = cif;
564n/a closure->fun = fun;
565n/a closure->user_data = user_data;
566n/a
567n/a return FFI_OK;
568n/a}
569n/a
570n/aint
571n/affi_closure_unix64_inner(ffi_closure *closure, void *rvalue,
572n/a struct register_args *reg_args, char *argp)
573n/a{
574n/a ffi_cif *cif;
575n/a void **avalue;
576n/a ffi_type **arg_types;
577n/a long i, avn;
578n/a int gprcount, ssecount, ngpr, nsse;
579n/a int ret;
580n/a
581n/a cif = closure->cif;
582n/a avalue = alloca(cif->nargs * sizeof(void *));
583n/a gprcount = ssecount = 0;
584n/a
585n/a ret = cif->rtype->type;
586n/a if (ret != FFI_TYPE_VOID)
587n/a {
588n/a enum x86_64_reg_class classes[MAX_CLASSES];
589n/a size_t n = examine_argument (cif->rtype, classes, 1, &ngpr, &nsse);
590n/a if (n == 0)
591n/a {
592n/a /* The return value goes in memory. Arrange for the closure
593n/a return value to go directly back to the original caller. */
594n/a rvalue = (void *) (unsigned long) reg_args->gpr[gprcount++];
595n/a /* We don't have to do anything in asm for the return. */
596n/a ret = FFI_TYPE_VOID;
597n/a }
598n/a else if (ret == FFI_TYPE_STRUCT && n == 2)
599n/a {
600n/a /* Mark which register the second word of the structure goes in. */
601n/a _Bool sse0 = SSE_CLASS_P (classes[0]);
602n/a _Bool sse1 = SSE_CLASS_P (classes[1]);
603n/a if (!sse0 && sse1)
604n/a ret |= 1 << 8;
605n/a else if (sse0 && !sse1)
606n/a ret |= 1 << 9;
607n/a }
608n/a }
609n/a
610n/a avn = cif->nargs;
611n/a arg_types = cif->arg_types;
612n/a
613n/a for (i = 0; i < avn; ++i)
614n/a {
615n/a enum x86_64_reg_class classes[MAX_CLASSES];
616n/a size_t n;
617n/a
618n/a n = examine_argument (arg_types[i], classes, 0, &ngpr, &nsse);
619n/a if (n == 0
620n/a || gprcount + ngpr > MAX_GPR_REGS
621n/a || ssecount + nsse > MAX_SSE_REGS)
622n/a {
623n/a long align = arg_types[i]->alignment;
624n/a
625n/a /* Stack arguments are *always* at least 8 byte aligned. */
626n/a if (align < 8)
627n/a align = 8;
628n/a
629n/a /* Pass this argument in memory. */
630n/a argp = (void *) ALIGN (argp, align);
631n/a avalue[i] = argp;
632n/a argp += arg_types[i]->size;
633n/a }
634n/a /* If the argument is in a single register, or two consecutive
635n/a integer registers, then we can use that address directly. */
636n/a else if (n == 1
637n/a || (n == 2 && !(SSE_CLASS_P (classes[0])
638n/a || SSE_CLASS_P (classes[1]))))
639n/a {
640n/a /* The argument is in a single register. */
641n/a if (SSE_CLASS_P (classes[0]))
642n/a {
643n/a avalue[i] = &reg_args->sse[ssecount];
644n/a ssecount += n;
645n/a }
646n/a else
647n/a {
648n/a avalue[i] = &reg_args->gpr[gprcount];
649n/a gprcount += n;
650n/a }
651n/a }
652n/a /* Otherwise, allocate space to make them consecutive. */
653n/a else
654n/a {
655n/a char *a = alloca (16);
656n/a int j;
657n/a
658n/a avalue[i] = a;
659n/a for (j = 0; j < n; j++, a += 8)
660n/a {
661n/a if (SSE_CLASS_P (classes[j]))
662n/a memcpy (a, &reg_args->sse[ssecount++], 8);
663n/a else
664n/a memcpy (a, &reg_args->gpr[gprcount++], 8);
665n/a }
666n/a }
667n/a }
668n/a
669n/a /* Invoke the closure. */
670n/a closure->fun (cif, rvalue, avalue, closure->user_data);
671n/a
672n/a /* Tell assembly how to perform return type promotions. */
673n/a return ret;
674n/a}
675n/a
676n/a#endif /* __x86_64__ */